Semiconductor devices must be packaged before they can be installed and used in electronic products or systems such as cell phones, portable computers, personal digital assistants and others. The semiconductor package must accommodate the size and operation of the device that its holds and consider several factors that impact the viability and longevity of the packaged device. These factors include the cost of the package and its mechanical and electrical characteristics.
One of the most efficient methods for packaging a device is assembling the device on a lead frame and encapsulating the assembly in an insulating material such as plastic resin. That method is widely used to package most commercial semiconductor devices and other methods, such as ceramic packaging, are used for special applications such as military and outer space applications. Most plastic encapsulation is carried out by using a transfer molding process. It permits a manufacturer to simultaneously encapsulate hundreds of devices. In a typical molding process a number of semiconductor dies are attached to die attach pads of a lead frame. The lead frame may hold four to six or more dies between opposite side rails. Tie bars extend from the side rails to the die attach pad. Leads surround the die attach pad. The leads have a bond region for receiving a wire bond. After the device is placed on the die attach pad, a wire bond machine connects very small diameter gold or aluminum wires between contact pads on the device and the leads. Portions of the leads extend outside the package. Some packages have prominent leads that extend into through holes in a printed circuit board. Other packages have smaller exposed leads and some packages are termed “leadless” because they merely expose the lower surface of a lead that has its upper surface wire bonded to the device.
Packaging is the last step in semiconductor device manufacturing. After the semiconductor die is packaged, it is ready for final test, shipment and use in a product. The package must accommodate the operational parameters of the device. Every device carries electrical current and thus every device generates heat. As more and more transistors are combined on a die or as power semiconductor devices are operated at higher voltages, higher currents and higher switching speeds, more heat is generated. There is no need for such heat and too much can destroy a device.
While plastic is an inexpensive and easy to use material, it is not a good conductor of heat. Many plastic encapsulated semiconductor devices require added cooling to remove excess heat, cool the device and keep the device from failing. One way of removing excess heat is the use of external heat sinks. These are simple thermal conductors affixed to the outside of a plastic package for carrying heat away from the package.
External heat sinks are simple to install but they are often insufficient to remove heat from the package because heat generated by the device must travel by conduction through the plastic encapsulating material. The low thermal conductivity of plastic may cause excess heat to accumulate in the package before the external heat sink can remove it from the device.
Others have attempted to solve this problem by proposing a heat sink molded into the plastic package. See for example U.S. Pat. No. 6,646,339. Its FIGS. 2B and 3 are representative of a typical internal heat sink. A half etched lead frame 170 has a heat sink pedestal 180 with half etched sections 150. Heat is transferred via thermal conduction from the bottom of the die 20 to the pedestal 110 where it is dissipated in the ambient environment of the device 13. One drawback of such an arrangement is that heat generated near the surface of the die 20 and travels through the thickness of the die before reaching the heat sink pedestal 110. However, the location of the heat sink at the bottom increases the assembly cost and there is not too much heat dissipated from the top of the package.
One solution to the problem or removing heat from the top surface of a die is proposed in U.S. Pat. No. 6,844,622. See its FIGS. 5, 6 and 7. That patent describes heat sinks 53, 63, and 73 that are located above the upper surface of a semiconductor die. All those heat sinks have an exposed external surface and an internal surface member that contacts or is in thermal conduction with the top surface of the die.
The solution provided in that patent has several drawbacks. The heat sink floats and is not anchored to the lead frame. Such a floating, uncontrolled heat sink may contact the bond wires and cause a short or open circuit or both. Indeed, even placing the heat sink into the mold risks damage to the delicate and fragile bond wires. If the height of the bond wires is not precisely controlled, one or more may contact the heat sink. Since the heat sink is typically metal, such contact with a bond wire will likely short out the device. The top of the exposed heat sink is the same size as the package. That type of structure is undesired because it leaves a continuous, unprotected external lateral interface between the molding compound the metal heat sink. Since the metal and the molding compound have different thermal coefficients of expansion, the heat sink surface with delaminate from the molding compound.